Microstrip versus Stripline

Microstrips are traces on the outer layer of a PCB,
as shown right.








Striplines are traces between two ground planes.
Striplines are less prone to emissions and susceptibility problems since the reference planes effectively shield the embedded traces. However, from the standpoint of high-speed transmission, the two parallel planes creates additional capacitance.

Regarding to LVDS signals, it is recommended the LVDS signals could be routed on microstrip transmission lines if possible.

Lumped versus Distributed System

Length of rising edge
l=rise time(ps)/medium delay(ps/in)

circuits size smaller than l/6 are lumped circuits, otherwise they are distributed circuits.

Ground Bounce

Ground bounce is crosstalk that occurs when there is a shift in the internal ground reference voltage due to output switching. This problem can result in erroneous state switching in ground-referenced (single-ended) gates. Essentially, transients on the ground disturb single-ended inputs that use the ground potential as a reference.
The ground and Vcc bounce cannot be eliminated, but providing low impedance, low inductance paths from the ground leads of the chip to the PCB ground can minimize their effects.
It is recommended that connecting each ground pin on a device directly to the PCB ground plane. Tying pins together and connecting them to the ground plane tends to increase inductance to ground and worsen ground bounce problems.

Decouple Circuit

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Clamp Circuit

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Latch-up Effect

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Intersymbol Interference(ISI)

Refer to Wikipedia ISI article.

In telecommunication, intersymbol interference(ISI) is a form of distortion of a signal in which one symbol interferes with subsequent symbols. This is an unwanted phenomenon as the previous symbols have similar effects as noise, thus making the communication less reliable.

ISI is usually caused by multipath propagation and the inherent non-linear frequency response of a channel. ISI arises because of imperfections in the overall frequency response of the system.
The presence of ISI in the system introduces errors in the decision device at the receiver output. Therefore in the design of the transmitting and receiving filters, the objective is to minimize the effect of ISI.

Ways to fight against intersymbol interference include adaptive equalization and error correcting codes.

Multiplath Propagation
Multipath propagation means a wireless signal from a transmitter reaches the receiver via many different paths. The cuase of this include reflection, refraction and atmospheric effects. Since all of these paths are different lengths, this results in the different versions of the signal arriving at different times. This delay means that part or all of a given symbol will be spread into the subsequent symbols, thereby interfering with the correct detecting of those symbols. Additionally, the various paths often distort the amplitude and/or phase of the signal thereby causing further interference with the received signal.

Bandlimited Channels
A bandlimited channel means the frequency response is zero above or below a certain frequency(the cutoff frequency). Passing a signal through such a channel results in the removal of frequency component above and below this cutoff frequency.
This filtering of the transmitted signal affects the shape of the pulse that arrives at the receiver. Besides it is spread out over the subsequent symbol periods. When a message is transmitted through a channel, the spread pulse of individual symbol will interfere with following symbols.
As opposed to multipath propagation, bandlimited channels are present in both wired and wireless communications. The limitation is often imposed by the desire to operate multiple independent signals through the same area/cable; due to this, each system is typically allocated a piece of the total bandwidth available.
The bandlimiting can also be due to the physical properties of the medium.
Communication systems that transmit data over bandlimited channels usually implement pulse shaping to avoid interference caused by the bandwidth limitation. Often the channel response is not known beforehand, and an adaptive equalizer is used to compensate the frequency response.

TTL&CMOS

Abbreviation
TTL - Transistor-Transistor Logic
HTTL - High-speed TTL
LTTL - Low-power TTL
STTL - Schottky TTL
LSTTL - Low-power Schottky TTL
ASTTL - Advanced Schottky TTL
ALSTTL- Advanced Low-power Schottky TTL
CMOS - Complementary Metal Oxide Semiconductor
HC/HCT- High-speed CMOS Logic
AC/ACT- Advanced CMOS Logic
AHC/AHCT-Advanced High-speed CMOS Logic

1. TTL logic level
Voh > 2.4V; Vol < 0.4V; Normally, Voh ="3.5V"; Vol ="0.2V"; Vih>= 2.0V; Vil <= 0.8V. Noise margin = 0.4V.
2. CMOS logic level
Logic 1 level voltage approximate source voltage(VDD)
Logic 0 level voltage approximate 0V(GND)
CMOS logic has higher noise margin than TTL logic.

3. Level transform
Since TTL and CMOS have different logic level, a level transform circuit(voltage ladder) is needed while a TTL device connects to a CMOS device.

4. TTL and CMOS comparison
1). TTL circuit is a current control device; CMOS circuit is a voltage control device.
2). TTL circuit has higher speed, shorter propagation delay(5~10ns) but consume more power. CMOS has lower speed, longer propagation delay(25~50ns) but lower power consumption. The power consumption of CMOS circuit is relative to the frequency of the input signal. Higher frequency will consume more power and therefore generate more heat.

5. CMOS device latch-up effect
When the input current is too large, the current inside the CMOS device will be latched and get increased until power off or device damaged. Some measures we could apply to prevent this,
1). Add clamp circuit at both input and output to prevent exceeding rated voltage.
2). Add decouple circuit at power input to prevent high voltage pulse.
3). Add current-limiting resistor between VDD and source power.
4). While power on the system, power on CMOS device prior signal and load. And inverse sequence while power off.

6. CMOS device application note
1). CMOS device is a voltage control device, it has a large input impedance and good noise immunity. Therefore DO NOT floating unused pins, provide them a steady voltage level by a pull-high or a pull-low resistor.
2). While the input pins connect to a low impedance signal source, put current-limiting resistors in series between inputs and signal source to limit the input current under 1mA. The CMOS device could be damaged when input current over 1mA.
3). Add matching resistors while connect to a long signal path.
4). While a large capacitor exists at the input, add a protecting resistor between input and the capacitor. Rp=V/1mA, where V is the voltage on the capacitor.